LEAP: Latency- Energy- and Area-optimized Lookup Pipeline Master’s Degree Project Report

Table lookups and other types of packet processing require so much memory bandwidth that the networking industry has long been a major consumer of specialized memories like TCAMs. Extensive research in algorithms for longest prefix matching and packet classification has laid the foundation for lookup engines relying on areaand power-efficient random access memories. Motivated by costs and semiconductor technology trends, designs from industry and academia implement multi-algorithm lookup pipelines by synthesizing multiple functions into hardware, or by adding programmability. In existing proposals, programmability comes with significant overhead. This report details LEAP, a latencyenergyand areaoptimized lookup pipeline based on an analysis of various lookup algorithms. This report describes the architecture and microarchitecture. It compares LEAP to PLUG, which relies on von-Neumann-style programmable processing. It shows LEAP has equivalent flexibility as PLUG while reducing chip area by 1.5×, power consumption by 1.3×, and latency typically by 5×. Furthermore, this report presents an intuitive Python-based API for programming LEAP. This report details completed work and suggests a path for future work on LEAP.